Fuses are well known in the integrated circuit industry for configuring or reconfiguring certain kinds of circuits. For example, in large memories, one generally includes several redundant memory blocks that can be used in case a block in the main memory is defective.
FIG. 1 shows a simplified block diagram of an integrated circuit 10 with embedded memory 20. Memory 20 is made up of a plurality of main memory blocks 30a-30p and redundant memory blocks 40a and 40b. If testing memory blocks 30a-30p shows that one or two of the blocks 30a-30p are defective, the defective block(s) can be disabled (or electrically disconnected) and redundant block(s) 40a and/or 40b enabled and effectively substituted in the place of the defective block(s). Conventionally, disabling defective blocks and enabling redundant blocks is done by cutting a series of fuses on the integrated circuit (IC), either electrically or with a laser. For speed and reliability purposes, laser cutting is generally preferred over electrical disconnection.
FIG. 2A shows a cross-sectional view of a conventional, three-level-metal IC 100, where the metal lines 110a-b, 120 and 130a-b are made by a conventional photolithographic process. Lines 110a-b are considered to be on the first level of metallization (M1), line 120 is considered to be on the second level of metallization (M2), and lines 130a-b are considered to be on the third level of metallization (M3). Metal line 120 serves as the fuse that electrically connects two circuit elements, such as a power supply/voltage potential (or an input signal) and a functional block of circuitry (such as a block of memory cells), to each other. The two circuit elements are electrically connected to the fuse through first and second polysilicon lines 140a-b (generally located over shallow trench isolation structures 142a-b), first and second contacts 144a-b, M1 lines 110a-b, and M1 vias 114a-b. 
FIG. 2B shows IC 100 after formation (typically by etching) of laser fuse well 135. Typically, the depth of laser fuse well 135 is carefully controlled, in order to leave a certain thickness T of oxide/dielectric material 125 over fuse 120. When one knows (1) the thicknesses of the materials overlying fuse 120 and (2) the effective wavelength of the laser light with which fuse 120 is irradiated (for cutting), then one may create or set up standing light waves in the remaining thickness T of oxide/dielectric material 125 over fuse 120 by etching the laser fuse well 135 to a relatively precise depth.
While not wishing to be bound to any particular theory, it is believed that when the fuse 120 is sufficiently irradiated, upper layer 122 absorbs some percentage of the light and heats up, along with the underlying bulk metal 124. The heated metal stresses the oxide/dielectric material 125 over fuse 120 (e.g., within thickness T), which eventually cracks and breaks when the stress placed thereon from metal thermal expansion forces exceeds the maximum strain of the oxide/dielectric material 125 over fuse 120 along thickness T. This typically opens a hole in the oxide/dielectric material 125 overlying fuse 120, and as the fuse 120 continues to absorb light from the laser, it continues to heat up, eventually vaporizing the remaining irradiated metal in fuse 120 to electrically disconnect the two circuit elements from one another.
Of course, opening a hole in an exposed surface of an IC introduces a risk of environmental contaminants, such as atmospheric oxygen, water vapor and ozone, getting into the IC and reacting with electrically functional circuit elements, such as metal lines. Also, due to variations in the thicknesses of the dielectric layers over fuse 120 and tolerances in the etching process that forms well 135, one generally applies more power than is necessary to sever the typical fuse 120 in order to ensure that one severs the worst-case fuse 120 (i.e., the fuse with the greatest thickness and the most overlying dielectric material). Sometimes, application of a little too much power (e.g., to a fuse having a relatively small thickness and a relatively thin overlying oxide in the well) can cause cracks to form in the oxide/dielectric material 112 underlying the fuse 120 as well. As a result, a guard ring 150 is generally formed in the metal layers around fuse 120 (the fuse 120 is connected to circuit elements via polysilicon lines 140a-b) to protect other circuit structures from such contamination.
However, in some cases, the physical damage from laser cutting a fuse is sufficient to render the chip defective. For example, if one has a process in which the yield of making perfectly functional memory blocks is 98%, and the laser cutting success rate is 99.9%, for a design requiring 16 memory blocks and providing 1000 die/wafer, on average, one will discard 4 die per wafer simply because the laser cutting process fails 1 time out of 1000. In a more memory-intensive design in a more advanced process technology (e.g., where the design requires 64 memory blocks and provides 2000 die/wafer), if the functional memory block yield is the same and the laser cutting success rate increases to 99.99%, one will discard, on average, 20 die per wafer simply because the laser cutting process fails 1 time out of 10,000. As one can see, it is commercially important to maximize the laser cutting rate, and reduce the possible laser repair failure mechanisms.
In all cases, guard rings consume area in the IC that does not contribute to electrical functionality. As a result, it is desirable to reduce or eliminate guard rings, structures in an IC that generally are not electrically functional circuitry. If one could eliminate the guard rings, one could increase the number of die per wafer by roughly the same percentage as the percentage of IC area consumed by the guard rings.
FIGS. 3A and 3B show a similar approach to making and using fuses where the metal processing technology is based on the well-known “damascene” metallization. Damascene processes are often used in semiconductor process technologies of 0.15 μm or less, and are nearly exclusively used for copper metallization. Some of the best-known commercial semiconductor process technologies that employ damascene metallization have six or more layers of metal, where the uppermost layer or two are composed primarily of copper.
FIG. 3A shows an IC 200 having four layers of damascene metal, M1 lines 246a and 246b, M2 lines 210a and 210b, M3 line 220, and M4 lines 230a-b. In one implementation, M4 lines 230a-b are composed primarily of copper, while M1 lines 246a and 246b, M2 lines 210a and 210b and M3 line 220 may be primarily composed of copper or aluminum (and if composed primarily of aluminum, capped by an antireflective and/or anti-hillock coating composed primarily of a transition metal, alloy or compound, such as titanium, titanium nitride, titanium-tungsten alloy or a combination thereof). Metal line 220 serves as the fuse that electrically connects two circuit elements to each other. The two circuit elements are electrically connected to the fuse 220 through first and second polysilicon lines 240a-b (generally located over shallow trench isolation structures 242a-b), first and second contacts 244a-b, M1 lines 246a-b, and M2 lines 210a-b. The “vias” between the M2/M3 metal lines and the underlying conductive structures are formed at the same time as the M2/M3 metal lines and are thus continuous therewith, but the via holes are etched separately from the trenches for the metal lines. Consequently, the process forming the structures in IC 200 is known as “dual damascene” metallization.
FIG. 3B shows IC 200 after forming laser fuse well 235. Similar to the case in FIG. 2B, one tries to control the depth of laser fuse well 235 as carefully as possible, in order to leave a known thickness T of oxide/dielectric material 225 over fuse 220. What complicates the “damascene” metal embodiment relative to the photolithographic metal embodiment are the thicknesses of the oxide/dielectric materials overlying fuse 220, which are typically on the order of 3-4 microns (3000-4000 nm). It can be quite challenging to consistently and/or reliably leave a known thickness T of less than 500 or 600 nm (about the wavelength or half-wavelength of the emitted laser light) over fuse 220, given the variations in process conditions that form IC 200 and laser fuse well 235. In addition, the process of severing the fuse leaves a hole in the upper surface of IC 200, just like in IC 100, thereby necessitating guard ring 250. Consequently, existing laser fuse technology has a number of drawbacks and/or areas where improvements can be made.
A need therefore exists for a more reliable method for (re)configuring a circuit using fuses and a method for making more compact (smaller IC area) fuses.